Aeluros 2005 PHY support in Linux-libre
Divy Le Ray
divy at chelsio.com
Thu Dec 4 19:23:42 UTC 2008
Alexandre Oliva wrote:
> I've been staring at sr_edc and twinax_edc, in the patch you posted at
> I can see that, as copyright holder and manufacturer of the part,
> Chelsio is entitled to publish those sequences of bits however it
> likes. However, I can't make sense of those bits to the point of being
> able to enjoy the right to modify that code, as granted by the GPL.
> Would it be possible to add any documentation as to what that sequence
> of numbers is supposed to mean? I can't even convince myself it's just
> data; it has a regularity that resembles machine code, which makes me
> wonder if you just forgot to include the corresponding sources in the
> patch, which anyone else would be required to have in order to be able
> to redistribute it under the GPL (e.g. as part of Linux).
> Unsure whether redistributing those bits under the GPL is even legal,
> I'm taking them out of linux-libre for the time being, but I'd be glad
> to put it back in once I'm convinced the four freedoms are available as
> to that piece of code.
> Thanks in advance for any information you might be able to share in this
This sequence number represents a series on MDIO register writes to the
This PHY supports different carrier modules - fiber or twinax,
and needs to be initialized differently depending on the module type
The sr_edc and twinax_edc tables are organized in (register,value) pairs,
which the driver writes this way:
for (i = 0; i < ARRAY_SIZE(XX_edc) && !err; i += 2)
err = mdio_write(phy, MDIO_DEV_PMA_PMD, twinax_edc[i],
twinax_edc[i + 1]);
Does it help?
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